1. Field of the Invention
This invention relates to integrated circuits and particularly to metal oxide semiconductor large scale integrated circuit (MOS/LSI) devices having N-channel or P-channel MOS field effect transistors such as are commonly used in calculators, home and office computers, automotive and industrial control systems, security systems, cryptographic systems, games and other commercial products. MOS/LSI devices use numerous circuit designs to achieve specific functions. One of the circuit designs used in MOS/LSI devices is a random number generator which provides a series of random digital numbers having a predetermined range. An ideal random digital number generator provides a series of digital numbers in which each number having a value within a predetermined range appears in random fashion with equal probability. The invention circuit provides this property and is particularly suitable for manufacture by standard integrated circuit processing steps.
2. Description of Prior Art
The most common random digital number generator uses a special semiconductor, such as a forward biasing diode or a back based zener diode. The output signal from the biased semiconductor device is amplified and fed to a limiter circuit. The noise property of the biased device makes the time at which the signal from the limiter translates from a first logic level to a second logic level intermediate. The interval during which the output of the limiter circuit remains in a first state or in a second state is therefore indeterminate. The output of the limiter is sampled by a clocked flip-flop, and the output of the flip-flop then represents the desired random digital signal.
The prior art circuit described is bandwidth limited by the properties of the selected biased semiconductor. The biased semiconductor is typically a special device and since the commercial demand for these devices is low, their availability is limited, and their price is high.
In addition, random digital number generator circuits that rely on the noise property of a biased semiconductor are typically sensitive to temperature and process variations, as well as periodic noise capable of locking the output noise property of the biased semiconductor to a particular periodic rate.